DJ Park, advised at Penn by Professor Andre Dehon and Professor Jing Li, remains fascinated by the Field-Programmable-Gate-Away (FPGA) chip. Fortunately, Park’s role as an MTS Software Engineer at Advanced Micro Devices (AMD) in San Jose allows him to continue his research as part of the architecture team.
“FPGA is a fascinating type of chip that can achieve performance comparable to a dedicated integrated circuit while remaining reprogrammable to adapt to different use cases,” Park says. “FPGA is already widely adopted across various fields, including communication, aerospace & defense, robotics, data centers, and AI. Their role will continue to grow as the demand for computation, energy efficiency, and adaptability continues to increase.”
FPGA may have immense capabilities. Yet many engineers abandon employing FPGAs given their steep learning curve. “My PhD thesis focused on lowering this barrier by creating an FPGA development environment that resembles traditional software programming,” Park says, adding, “the related works have been published in the premier reconfigurable computing conferences and journals, including FPGA, FPL, FPT, and TRETS.”
As a member of AMD’s FPGA architecture team, Park’s work has transitioned from that as a user to that as a vendor. “I work on efficiently mapping different workloads on today’s FPGA, identifying the limitations of the current FPGA architecture, and proposing the next-generation FPGA architecture. ”As an ESE PhD Alumni, Park continues to write and review academic papers in the field. Learn more about Park’s work here