Aditya Agarwal learned how power is modeled and analyzed for complex, high-performance SoCs and GPUs at NVIDIA in Santa Clara, California where he worked this summer as a Power Architecture intern. As a second year EE master’s student, Agarwal deeply valued working on production-scale hardware with engineers designing some of the most advanced computing systems in the industry.
Focal points of Agarwal’s internship include working on post-silicon power modeling. “I used hardware telemetry and workload characteristics to understand and predict power behavior across different applications,” Agarwal says. “The experience also taught me how techniques can be applied to real hardware problems, as I developed a power model using silicon data,” Agarwal explains. This experience gave Agarwal the ability to understand “ how architectural decisions, workload behavior, and hardware measurements come together when optimizing modern computing systems for performance and power efficiency.”
The above experiences provided Agarwal with “meaningful technical ownership rather than a purely exploratory intern project.” This allowed Agarwal to “to see how engineering decisions are made and validated on actual silicon. I also really valued the mentorship and technical discussions with my team, which helped me develop a much stronger understanding of GPU and SoC architecture.”
When Agarwal isn’t working, he enjoys dancing, traveling, exploring new places, and following technology in the semiconductor industry..” I also enjoy spending time with friends and staying active.”